@article {64597,
	title = {Comparative Analysis of Two Op-Amp Topologies for a 40MS/s 8-bitPipelined ADC in 0.18μm CMOS Technology, ISSN / e-ISSN 1790-5052 / 2224-3488},
	journal = {WSEAS TRANSACTIONS ON SIGNAL PROCESSINGWSEAS TRANSACTIONS ON SIGNAL PROCESSING},
	volume = {Volume 13},
	year = {2017},
	month = {2017},
	pages = {pp 83-89},
	abstract = {The performances of two full differential operational amplifiers (Op-Amps) telescopic and folded-cascode are evaluated to satisfy the stringent requirements on the amplifier to be used in a Multiplying Digital-to-Analog Converter (MDAC) stage of a pipelined ADC (Analog-to-Digital Converter). The paper shows the solutions found to reach high gain, wide bandwidth and short settling time without degrading too much the output swing. The Op-Amp specifications are extracted according to the ADC requirements, then the two Op-Amp topologies are designed, tested and their performances are compared. Simulation results show that the Op-Amp folded-cascode topology is more suitable architecture for pipelined ADC than the telescopic one. Moreover, the use of this type of Op-Amp generates an Integral Non-Linearity (INL) error less than that of the telescopic one. The analyses and simulation results are obtained using 0.18 {\textmu}m AMS (Austria Mikro System) CMOS process parameters with a power supply voltage of 1.8V. The predicted performance is verified by analysis and simulations using Cadence EDA simulator.},
	author = {Dendouga Abdelghani and Slimane, Oussalah}
}
