<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">E.Chebaki</style></author><author><style face="normal" font="default" size="100%">DJEFFAL Fayçal</style></author><author><style face="normal" font="default" size="100%">Hichem, Ferhati</style></author><author><style face="normal" font="default" size="100%">Toufik, Bentrcia</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">Improved analog/RF performance of double gate junctionless MOSFET using both gate material engineering and drain/source extensions, ISSN 0749-6036</style></title><secondary-title><style face="normal" font="default" size="100%">Superlattices and MicrostructuresSuperlattices and Microstructures</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2016</style></year><pub-dates><date><style  face="normal" font="default" size="100%">2016</style></date></pub-dates></dates><volume><style face="normal" font="default" size="100%">Volume 92</style></volume><pages><style face="normal" font="default" size="100%">pp 80-91</style></pages><language><style face="normal" font="default" size="100%">eng</style></language><abstract><style face="normal" font="default" size="100%">In this paper, we propose a new Double Gate Junctionless (DGJ) MOSFET design based on both gate material engineering and drain/source extensions. Analytical models for the long channel device associated to the drain current, analog and radio-frequency (RF) performance parameters are developed incorporating the impact of dual-material gate engineering and two highly doped extension regions on the analog/RF performance of DGJ MOSFET. The transistor performance figures-of-merit (FoM), governing the analog/RF behavior, have also been analyzed. The analog/RF performance is compared between the proposed design and a conventional DGJ MOSFET of similar dimensions, where the proposed device shows excellent ability in improving the analog/RF performance and provides higher drain current and improved figures-of-merit as compared to the conventional DGJ MOSFET. The obtained results have been validated against the data obtained from TCAD software for a wide range of design parameters. Moreover, the developed analytical models are used as mono-objective function to optimize the device analog/RF performance using Genetic Algorithms (GAs). In comparison with the reported numerical data for Inversion-Mode (IM) DG MOSFET, our optimized performance metrics for JL device exhibit enhancement over the reported data for IM device at the same channel length.</style></abstract></record></records></xml>