<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">Chafik, Arar</style></author><author><style face="normal" font="default" size="100%">Salah, Khireddine Mohamed</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">Hybrid Software Redundancy Approach for Building Reliable Communication in Multi-BUS Heterogeneous Systems, ISSN / e-ISSN 0218-5393 / 1793-6446</style></title><secondary-title><style face="normal" font="default" size="100%">International Journal of Reliability, Quality and Safety EngineeringInternational Journal of Reliability, Quality and Safety Engineering</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2016</style></year><pub-dates><date><style  face="normal" font="default" size="100%">2016</style></date></pub-dates></dates><number><style face="normal" font="default" size="100%">N° 4</style></number><volume><style face="normal" font="default" size="100%">Volume 23</style></volume><pages><style face="normal" font="default" size="100%">pp 1650013</style></pages><language><style face="normal" font="default" size="100%">eng</style></language><abstract><style face="normal" font="default" size="100%">The paper proposes a new reliable fault-tolerant scheduling algorithm for real-time embedded systems. The proposed algorithm is based on static scheduling that allows to include the dependencies and the execution cost of tasks and data dependencies in its scheduling decisions. Our scheduling algorithm is dedicated to multi-bus heterogeneous architectures with multiple processors linked by several shared buses. This scheduling algorithm is considering only one bus fault caused by hardware faults and compensated by software redundancy solutions. The proposed algorithm is based on both active and passive backup copies to minimize the scheduling length of data on buses. In the experiments, the proposed methods are evaluated in terms of data scheduling length for a set of DSP benchmarks. The experimental results show the effectiveness of our technique.</style></abstract></record></records></xml>