In the last few years, an accelerated trend towards the miniaturization of nanoscale circuits has been recorded. In this context, the Tunneling Field-Effect Transistors (TFETs) are gaining attention because of their good subthreshold characteristics, high scalability and low leakage current. However, they suffer from low values of the ON-state current and severe ambipolar transport mechanism. The aim of this work is to investigate the performance of SiGe nanoscale Double Gate TFET device including low doped drain region. The electrical performance of the considered device is investigated numerically using ATLAS 2D simulator, where both scaling and reliability aspects of the proposed design are reported. In this context, we address the impact of the channel length, traps density and drain doping parameters on the variation of some figures of merit of the device namely the swing factor and the ION/IOFF ratio. The obtained results indicate the superior immunity of the proposed design against traps induced degradation in comparison to the conventional TFET structure. Therefore, this work can offer more insights regarding the benefit of adopting channel materials and drain doping engineering techniques for future reliable low-power nanoscale electronic applications.

In the last few years, an accelerated trend towards the miniaturization of nanoscale circuits has been recorded. In this context, the Tunneling Field-Effect Transistors (TFETs) are gaining attention because of their good subthreshold characteristics, high scalability and low leakage current. However, they suffer from low values of the ON-state current and severe ambipolar transport mechanism. The aim of this work is to investigate the performance of SiGe nanoscale Double Gate TFET device including low doped drain region. The electrical performance of the considered device is investigated numerically using ATLAS 2D simulator, where both scaling and reliability aspects of the proposed design are reported. In this context, we address the impact of the channel length, traps density and drain doping parameters on the variation of some figures of merit of the device namely the swing factor and the ION/IOFF ratio. The obtained results indicate the superior immunity of the proposed design against traps induced degradation in comparison to the conventional TFET structure. Therefore, this work can offer more insights regarding the benefit of adopting channel materials and drain doping engineering techniques for future reliable low-power nanoscale electronic applications.

In the last few years, an accelerated trend towards the miniaturization of nanoscale circuits has been recorded. In this context, the Tunneling Field-Effect Transistors (TFETs) are gaining attention because of their good subthreshold characteristics, high scalability and low leakage current. However, they suffer from low values of the ON-state current and severe ambipolar transport mechanism. The aim of this work is to investigate the performance of SiGe nanoscale Double Gate TFET device including low doped drain region. The electrical performance of the considered device is investigated numerically using ATLAS 2D simulator, where both scaling and reliability aspects of the proposed design are reported. In this context, we address the impact of the channel length, traps density and drain doping parameters on the variation of some figures of merit of the device namely the swing factor and the ION/IOFF ratio. The obtained results indicate the superior immunity of the proposed design against traps induced degradation in comparison to the conventional TFET structure. Therefore, this work can offer more insights regarding the benefit of adopting channel materials and drain doping engineering techniques for future reliable low-power nanoscale electronic applications.

Dopant diffusion in semiconductors is a very important in process step of device. diffusion has a great influence on the electrical and electronic properties especially in the lacunary and interstitial mechanismis. This chapter investigates the diffusion of P and B in Si. The profiles have been simulated using Secondary Ion Mass Spectrometry (SIMS) modele [1,2]. In the process for manufacturing MOS transistor, the manufacturers follow basically three steps. The starting substrate is a monocrystalline silicon wafer. The first step consists in producing the polysilicon gate on a thin layer of SiO2 followed by implantation (boron) of the gate. The second step is the training of source-drain junctions by ion implantation to high dose (≈ 10 15 at / cm2) and the third is to silicide the source-drain junctions for reduce the contact resistance. One of the most promising silicides is the monosilicide of nickel (NiSi). therefore, it is very important to understand the redistribution of dopants in the different active parts of a transistor by studying the following points: • The redistribution of boron in polycrystalline silicon (gate), • The redistribution of boron in the monocrystal

Dopant diffusion in semiconductors is a very important in process step of device. diffusion has a great influence on the electrical and electronic properties especially in the lacunary and interstitial mechanismis. This chapter investigates the diffusion of P and B in Si. The profiles have been simulated using Secondary Ion Mass Spectrometry (SIMS) modele [1,2]. In the process for manufacturing MOS transistor, the manufacturers follow basically three steps. The starting substrate is a monocrystalline silicon wafer. The first step consists in producing the polysilicon gate on a thin layer of SiO2 followed by implantation (boron) of the gate. The second step is the training of source-drain junctions by ion implantation to high dose (≈ 10 15 at / cm2) and the third is to silicide the source-drain junctions for reduce the contact resistance. One of the most promising silicides is the monosilicide of nickel (NiSi). therefore, it is very important to understand the redistribution of dopants in the different active parts of a transistor by studying the following points: • The redistribution of boron in polycrystalline silicon (gate), • The redistribution of boron in the monocrystal

Dopant diffusion in semiconductors is a very important in process step of device. diffusion has a great influence on the electrical and electronic properties especially in the lacunary and interstitial mechanismis. This chapter investigates the diffusion of P and B in Si. The profiles have been simulated using Secondary Ion Mass Spectrometry (SIMS) modele [1,2]. In the process for manufacturing MOS transistor, the manufacturers follow basically three steps. The starting substrate is a monocrystalline silicon wafer. The first step consists in producing the polysilicon gate on a thin layer of SiO2 followed by implantation (boron) of the gate. The second step is the training of source-drain junctions by ion implantation to high dose (≈ 10 15 at / cm2) and the third is to silicide the source-drain junctions for reduce the contact resistance. One of the most promising silicides is the monosilicide of nickel (NiSi). therefore, it is very important to understand the redistribution of dopants in the different active parts of a transistor by studying the following points: • The redistribution of boron in polycrystalline silicon (gate), • The redistribution of boron in the monocrystal