In this paper, the method for the nonlinear control design of a permanent magnet synchronous generator based-wind energy conversion system (WECS) is proposed in order to obtain robustness against disturbances and harvest a maximum power from a typical stochastic wind environment. The technique overcomes both the problem of nonlinearity and the uncertainty of the parameter compared to such classical control designs based on traditional control techniques. The method is based on the differential geometric feedback linearization technique (DGT) and the Lyapunov theory. The results obtained show the effectiveness and performance of the proposed approach.

In this paper, the method for the nonlinear control design of a permanent magnet synchronous generator based-wind energy conversion system (WECS) is proposed in order to obtain robustness against disturbances and harvest a maximum power from a typical stochastic wind environment. The technique overcomes both the problem of nonlinearity and the uncertainty of the parameter compared to such classical control designs based on traditional control techniques. The method is based on the differential geometric feedback linearization technique (DGT) and the Lyapunov theory. The results obtained show the effectiveness and performance of the proposed approach.

In this paper, the method for the nonlinear control design of a permanent magnet synchronous generator based-wind energy conversion system (WECS) is proposed in order to obtain robustness against disturbances and harvest a maximum power from a typical stochastic wind environment. The technique overcomes both the problem of nonlinearity and the uncertainty of the parameter compared to such classical control designs based on traditional control techniques. The method is based on the differential geometric feedback linearization technique (DGT) and the Lyapunov theory. The results obtained show the effectiveness and performance of the proposed approach.

In this paper, channel doping engineering aspect is proposed as a new way to improve the junctionless Gate All Around (GAA) MOSFET performance for digital and analog applications. The amended channel doping consists of a lateral graded profile, where the channel is divided into two regions with different doping levels. Analytical approaches for the drain current, leakage power, digital and small signal parameters are developed incorporating the impact of graded channel doping (GCD) paradigm on the device electrical behavior. Exhaustive study based on a performance comparison between the proposed structure and the conventional one is carried out, where the proposed design exhibits a good capability in improving the overall device figures-of-merit (FoMs), governing the leakage and the analog performance. More importantly, Particle Swarm Optimization (PSO) approach is proposed as a metaheuristic technique to boost the device performance through carefully adjusting the design parameters of the proposed GCD feature. It is found that the optimized design outperforms considerably the conventional counterpart and enable making wise trade-offs, where an enhancement of 300% in the I ON /I OFF ratio, 482% in the intrinsic gain, and 340% in the cut-off frequency has been reached. Besides, the proposed design provides a sufficient capability for suppression of the leakage effects. The obtained results underline the distinctive property of the proposed design for bridging the gap between high analog and digital performances with ultra-low power consumption. This makes the proposed design a potential alternative for ultra-low power and high electrical performance applications.

In this paper, channel doping engineering aspect is proposed as a new way to improve the junctionless Gate All Around (GAA) MOSFET performance for digital and analog applications. The amended channel doping consists of a lateral graded profile, where the channel is divided into two regions with different doping levels. Analytical approaches for the drain current, leakage power, digital and small signal parameters are developed incorporating the impact of graded channel doping (GCD) paradigm on the device electrical behavior. Exhaustive study based on a performance comparison between the proposed structure and the conventional one is carried out, where the proposed design exhibits a good capability in improving the overall device figures-of-merit (FoMs), governing the leakage and the analog performance. More importantly, Particle Swarm Optimization (PSO) approach is proposed as a metaheuristic technique to boost the device performance through carefully adjusting the design parameters of the proposed GCD feature. It is found that the optimized design outperforms considerably the conventional counterpart and enable making wise trade-offs, where an enhancement of 300% in the I ON /I OFF ratio, 482% in the intrinsic gain, and 340% in the cut-off frequency has been reached. Besides, the proposed design provides a sufficient capability for suppression of the leakage effects. The obtained results underline the distinctive property of the proposed design for bridging the gap between high analog and digital performances with ultra-low power consumption. This makes the proposed design a potential alternative for ultra-low power and high electrical performance applications.

In this work, versatile CdS/Cu 2 ZnSnS 4 (CZTS) solar cell designs based on intermediate metallic sub-layers (Au, Ti, and Ag) engineering are proposed for enhancing light-scattering behavior and reducing recombination losses. The idea behind this work is to generate optical confinement regions in the CZTS absorber layer to achieve an improved absorption and appropriate antireflection effects. Moreover, the ultra-thin metal at the CZTS/Mo interface can be helpful for reducing the series resistance, where it behaves like a blocking layer for the Sulfur diffusion. We further combine the proposed designs with Particle Swarm Optimization (PSO)-based approach to achieve broadband absorption and boost the conversion efficiency. It is found that the optimized design with Ti sub-layer improves the CZTS solar cell properties, where it yields 31% improvement in short-circuit current and 60% in the power efficiency over the conventional one. Therefore, the optimized designs provide the opportunity for bridging the gap between improving the optical behavior and reducing the recombination losses.

In this work, versatile CdS/Cu 2 ZnSnS 4 (CZTS) solar cell designs based on intermediate metallic sub-layers (Au, Ti, and Ag) engineering are proposed for enhancing light-scattering behavior and reducing recombination losses. The idea behind this work is to generate optical confinement regions in the CZTS absorber layer to achieve an improved absorption and appropriate antireflection effects. Moreover, the ultra-thin metal at the CZTS/Mo interface can be helpful for reducing the series resistance, where it behaves like a blocking layer for the Sulfur diffusion. We further combine the proposed designs with Particle Swarm Optimization (PSO)-based approach to achieve broadband absorption and boost the conversion efficiency. It is found that the optimized design with Ti sub-layer improves the CZTS solar cell properties, where it yields 31% improvement in short-circuit current and 60% in the power efficiency over the conventional one. Therefore, the optimized designs provide the opportunity for bridging the gap between improving the optical behavior and reducing the recombination losses.

In this paper, the role of introducing an intermediate Indium Tin Oxide (ITO) thin-film in improving the Au/Si Schottky Barrier Diodes (SBDs) electrical performance is experimentally analyzed. The Au/ITO/Si/Au structures with different ITO thicknesses were fabricated using RF magnetron sputtering technique. The current-voltage (I-V) characteristics of the investigated structures are analyzed, where the device electrical parameters are extracted. It is found that the introduced ITO thin-film has a significant impact in reducing the ideality factor (n=1.25), the interfacial defects (Nss=1.5×1012 eV-1cm-2) and the series resistance (Rs=32Ω). Our study demonstrates that the use of ITO intermediate thin-film can generate minority carrier injection effects, which lead to achieve the dual role of enhanced derived current and lower series resistance. Moreover, the structure thermal stability behavior is investigated and compared with those of the conventional design in order to reveal the device reliability against the thermal variation. Furthermore, the effect of the annealing on the device thermal stability is also analyzed. Our investigation shows that the annealed structure provides the possibility for avoiding the degradation related-heating effects. Therefore, the proposed Au/ITO/Si/Au structure offers the opportunity for bridging the gap between achieving superior electrical performance and enhanced thermal stability. The obtained results may facilitate the design of high-performance SBDs for sensing and microelectronic applications.

In this paper, the role of introducing an intermediate Indium Tin Oxide (ITO) thin-film in improving the Au/Si Schottky Barrier Diodes (SBDs) electrical performance is experimentally analyzed. The Au/ITO/Si/Au structures with different ITO thicknesses were fabricated using RF magnetron sputtering technique. The current-voltage (I-V) characteristics of the investigated structures are analyzed, where the device electrical parameters are extracted. It is found that the introduced ITO thin-film has a significant impact in reducing the ideality factor (n=1.25), the interfacial defects (Nss=1.5×1012 eV-1cm-2) and the series resistance (Rs=32Ω). Our study demonstrates that the use of ITO intermediate thin-film can generate minority carrier injection effects, which lead to achieve the dual role of enhanced derived current and lower series resistance. Moreover, the structure thermal stability behavior is investigated and compared with those of the conventional design in order to reveal the device reliability against the thermal variation. Furthermore, the effect of the annealing on the device thermal stability is also analyzed. Our investigation shows that the annealed structure provides the possibility for avoiding the degradation related-heating effects. Therefore, the proposed Au/ITO/Si/Au structure offers the opportunity for bridging the gap between achieving superior electrical performance and enhanced thermal stability. The obtained results may facilitate the design of high-performance SBDs for sensing and microelectronic applications.

In this paper, the role of introducing an intermediate Indium Tin Oxide (ITO) thin-film in improving the Au/Si Schottky Barrier Diodes (SBDs) electrical performance is experimentally analyzed. The Au/ITO/Si/Au structures with different ITO thicknesses were fabricated using RF magnetron sputtering technique. The current-voltage (I-V) characteristics of the investigated structures are analyzed, where the device electrical parameters are extracted. It is found that the introduced ITO thin-film has a significant impact in reducing the ideality factor (n=1.25), the interfacial defects (Nss=1.5×1012 eV-1cm-2) and the series resistance (Rs=32Ω). Our study demonstrates that the use of ITO intermediate thin-film can generate minority carrier injection effects, which lead to achieve the dual role of enhanced derived current and lower series resistance. Moreover, the structure thermal stability behavior is investigated and compared with those of the conventional design in order to reveal the device reliability against the thermal variation. Furthermore, the effect of the annealing on the device thermal stability is also analyzed. Our investigation shows that the annealed structure provides the possibility for avoiding the degradation related-heating effects. Therefore, the proposed Au/ITO/Si/Au structure offers the opportunity for bridging the gap between achieving superior electrical performance and enhanced thermal stability. The obtained results may facilitate the design of high-performance SBDs for sensing and microelectronic applications.

In this paper, the role of introducing an intermediate Indium Tin Oxide (ITO) thin-film in improving the Au/Si Schottky Barrier Diodes (SBDs) electrical performance is experimentally analyzed. The Au/ITO/Si/Au structures with different ITO thicknesses were fabricated using RF magnetron sputtering technique. The current-voltage (I-V) characteristics of the investigated structures are analyzed, where the device electrical parameters are extracted. It is found that the introduced ITO thin-film has a significant impact in reducing the ideality factor (n=1.25), the interfacial defects (Nss=1.5×1012 eV-1cm-2) and the series resistance (Rs=32Ω). Our study demonstrates that the use of ITO intermediate thin-film can generate minority carrier injection effects, which lead to achieve the dual role of enhanced derived current and lower series resistance. Moreover, the structure thermal stability behavior is investigated and compared with those of the conventional design in order to reveal the device reliability against the thermal variation. Furthermore, the effect of the annealing on the device thermal stability is also analyzed. Our investigation shows that the annealed structure provides the possibility for avoiding the degradation related-heating effects. Therefore, the proposed Au/ITO/Si/Au structure offers the opportunity for bridging the gap between achieving superior electrical performance and enhanced thermal stability. The obtained results may facilitate the design of high-performance SBDs for sensing and microelectronic applications.