In this paper, the analytical investigation of a new design including drain and source extensions is presented to assess the electrical behavior of cylindrical gate-all-around junctionless (GAAJ) MOSFET for high performance RF and analog applications. Analytical models for drain current and performance parameters are derived incorporating the effect of two highly doped extension regions. Various analog and RF parameters like transconductance, cut-off frequency, drain current drivability, voltage gain and linearity characteristics have also been investigated. The proposed design shows excellent ability in improving the analog performance and provides a good solution to enhance the RF behavior and linearity of GAAJ MOSFET for low cost and high performance analog/RF applications. The proposed model results have been validated against the data obtained from a commercially available numerical device simulator. Moreover, the developed analytical approaches are easy to be implemented into microelectronic software simulators and therefore allow the study of the GAAJ-based deep submicron circuits

In this paper, the analytical investigation of a new design including drain and source extensions is presented to assess the electrical behavior of cylindrical gate-all-around junctionless (GAAJ) MOSFET for high performance RF and analog applications. Analytical models for drain current and performance parameters are derived incorporating the effect of two highly doped extension regions. Various analog and RF parameters like transconductance, cut-off frequency, drain current drivability, voltage gain and linearity characteristics have also been investigated. The proposed design shows excellent ability in improving the analog performance and provides a good solution to enhance the RF behavior and linearity of GAAJ MOSFET for low cost and high performance analog/RF applications. The proposed model results have been validated against the data obtained from a commercially available numerical device simulator. Moreover, the developed analytical approaches are easy to be implemented into microelectronic software simulators and therefore allow the study of the GAAJ-based deep submicron circuits

In this paper, the analytical investigation of a new design including drain and source extensions is presented to assess the electrical behavior of cylindrical gate-all-around junctionless (GAAJ) MOSFET for high performance RF and analog applications. Analytical models for drain current and performance parameters are derived incorporating the effect of two highly doped extension regions. Various analog and RF parameters like transconductance, cut-off frequency, drain current drivability, voltage gain and linearity characteristics have also been investigated. The proposed design shows excellent ability in improving the analog performance and provides a good solution to enhance the RF behavior and linearity of GAAJ MOSFET for low cost and high performance analog/RF applications. The proposed model results have been validated against the data obtained from a commercially available numerical device simulator. Moreover, the developed analytical approaches are easy to be implemented into microelectronic software simulators and therefore allow the study of the GAAJ-based deep submicron circuits

In this paper, we propose a new Double Gate Junctionless (DGJ) MOSFET design based on both gate material engineering and drain/source extensions. Analytical models for the long channel device associated to the drain current, analog and radio-frequency (RF) performance parameters are developed incorporating the impact of dual-material gate engineering and two highly doped extension regions on the analog/RF performance of DGJ MOSFET. The transistor performance figures-of-merit (FoM), governing the analog/RF behavior, have also been analyzed. The analog/RF performance is compared between the proposed design and a conventional DGJ MOSFET of similar dimensions, where the proposed device shows excellent ability in improving the analog/RF performance and provides higher drain current and improved figures-of-merit as compared to the conventional DGJ MOSFET. The obtained results have been validated against the data obtained from TCAD software for a wide range of design parameters. Moreover, the developed analytical models are used as mono-objective function to optimize the device analog/RF performance using Genetic Algorithms (GAs). In comparison with the reported numerical data for Inversion-Mode (IM) DG MOSFET, our optimized performance metrics for JL device exhibit enhancement over the reported data for IM device at the same channel length.

In this paper, we propose a new Double Gate Junctionless (DGJ) MOSFET design based on both gate material engineering and drain/source extensions. Analytical models for the long channel device associated to the drain current, analog and radio-frequency (RF) performance parameters are developed incorporating the impact of dual-material gate engineering and two highly doped extension regions on the analog/RF performance of DGJ MOSFET. The transistor performance figures-of-merit (FoM), governing the analog/RF behavior, have also been analyzed. The analog/RF performance is compared between the proposed design and a conventional DGJ MOSFET of similar dimensions, where the proposed device shows excellent ability in improving the analog/RF performance and provides higher drain current and improved figures-of-merit as compared to the conventional DGJ MOSFET. The obtained results have been validated against the data obtained from TCAD software for a wide range of design parameters. Moreover, the developed analytical models are used as mono-objective function to optimize the device analog/RF performance using Genetic Algorithms (GAs). In comparison with the reported numerical data for Inversion-Mode (IM) DG MOSFET, our optimized performance metrics for JL device exhibit enhancement over the reported data for IM device at the same channel length.

In this paper, we propose a new Double Gate Junctionless (DGJ) MOSFET design based on both gate material engineering and drain/source extensions. Analytical models for the long channel device associated to the drain current, analog and radio-frequency (RF) performance parameters are developed incorporating the impact of dual-material gate engineering and two highly doped extension regions on the analog/RF performance of DGJ MOSFET. The transistor performance figures-of-merit (FoM), governing the analog/RF behavior, have also been analyzed. The analog/RF performance is compared between the proposed design and a conventional DGJ MOSFET of similar dimensions, where the proposed device shows excellent ability in improving the analog/RF performance and provides higher drain current and improved figures-of-merit as compared to the conventional DGJ MOSFET. The obtained results have been validated against the data obtained from TCAD software for a wide range of design parameters. Moreover, the developed analytical models are used as mono-objective function to optimize the device analog/RF performance using Genetic Algorithms (GAs). In comparison with the reported numerical data for Inversion-Mode (IM) DG MOSFET, our optimized performance metrics for JL device exhibit enhancement over the reported data for IM device at the same channel length.

In this paper, we propose a new Double Gate Junctionless (DGJ) MOSFET design based on both gate material engineering and drain/source extensions. Analytical models for the long channel device associated to the drain current, analog and radio-frequency (RF) performance parameters are developed incorporating the impact of dual-material gate engineering and two highly doped extension regions on the analog/RF performance of DGJ MOSFET. The transistor performance figures-of-merit (FoM), governing the analog/RF behavior, have also been analyzed. The analog/RF performance is compared between the proposed design and a conventional DGJ MOSFET of similar dimensions, where the proposed device shows excellent ability in improving the analog/RF performance and provides higher drain current and improved figures-of-merit as compared to the conventional DGJ MOSFET. The obtained results have been validated against the data obtained from TCAD software for a wide range of design parameters. Moreover, the developed analytical models are used as mono-objective function to optimize the device analog/RF performance using Genetic Algorithms (GAs). In comparison with the reported numerical data for Inversion-Mode (IM) DG MOSFET, our optimized performance metrics for JL device exhibit enhancement over the reported data for IM device at the same channel length.

The back propagation (BP) algorithm has been very successful in training multilayer perceptron-based equalisers; despite its success BP convergence is still too slow. Within this paper we present a new approach to enhance the training efficiency of the multilayer perceptron-based equaliser (MLPE). Our approach consists on modifying the conventional back propagation algorithm, through creating an adaptive nonlinearity in the activation function. Experiment results evaluates the performance of the MLPE trained using the conventional BP and the improved back propagation with adaptive gain (IBPAG). Due to the adaptability of the activation function gain the nonlinear capacity and flexibility of the MLP is enhanced significantly. Therefore, the convergence properties of the proposed algorithm are more improved compared to the BP. The proposed algorithm achieves the best performance in the entire simulation experiments.

The back propagation (BP) algorithm has been very successful in training multilayer perceptron-based equalisers; despite its success BP convergence is still too slow. Within this paper we present a new approach to enhance the training efficiency of the multilayer perceptron-based equaliser (MLPE). Our approach consists on modifying the conventional back propagation algorithm, through creating an adaptive nonlinearity in the activation function. Experiment results evaluates the performance of the MLPE trained using the conventional BP and the improved back propagation with adaptive gain (IBPAG). Due to the adaptability of the activation function gain the nonlinear capacity and flexibility of the MLP is enhanced significantly. Therefore, the convergence properties of the proposed algorithm are more improved compared to the BP. The proposed algorithm achieves the best performance in the entire simulation experiments.

The back propagation (BP) algorithm has been very successful in training multilayer perceptron-based equalisers; despite its success BP convergence is still too slow. Within this paper we present a new approach to enhance the training efficiency of the multilayer perceptron-based equaliser (MLPE). Our approach consists on modifying the conventional back propagation algorithm, through creating an adaptive nonlinearity in the activation function. Experiment results evaluates the performance of the MLPE trained using the conventional BP and the improved back propagation with adaptive gain (IBPAG). Due to the adaptability of the activation function gain the nonlinear capacity and flexibility of the MLP is enhanced significantly. Therefore, the convergence properties of the proposed algorithm are more improved compared to the BP. The proposed algorithm achieves the best performance in the entire simulation experiments.